This invention relates to a driver circuit capable of preventing current flowing therethrough from sharply increasing when a load begins to be operated.
In recent years, electronic timepieces have come to be built in various types of electrical devices. The electronic timepieces include a display element formed of, for example, a light-emitting diode (abbreviated as "LED"). Such light-emitting element used as a load sends forth light beams upon introduction of current through a driver circuit. When the load begins to be operated, current flowing through the driver circuit sharply increases with the resultant occurrence of harmonics, and sometimes noises in other circuits included in an electrical device. Where an electrical device containing an electronic timepiece is an acoustic device such as a stereophonic system or a radio receiver, then the above-mentioned noises exert a prominently harmful effect on the acoustic device from the standpoint of a high precision acoustic characteristic demanded of said acoustic device.
To date, a driver circuit has been proposed which can reduce to some extent the rapid rate at which current flowing through said driver circuit increases when a load begins to be operated.
With the prior art driver circuit whose arrangement is schematically shown in FIG. 1, an inverter 6 is formed of the enhancement type P-channel field effect transistor 4 (hereinafter referred to as "FET") and depletion type P-channel FET 2. The gate of the P-channel FET 4 is connected to an input terminal 8. Connected to the output side of the inverter 6 is an enhancement type P-channel FET 10 acting as a switching element. The drain electrode of the P-channel FET 10 is connected to the output terminal 12 of said prior art driver circuit. With this driver circuit, the switching FET 10 is rendered conducting or nonconducting according to a level of an output signal being received from the inverter 6. This inverter 6 which includes the FETs 2,4 having a small mutual conductance Gm, has a small time constant. Because of the small time constant, the level of the voltage applied to the gate of switching FET 10 is elevated slowly, thereby decreasing the rapid rate at which current flowing through the driver circuit increases when a load begins to be operated.
FIG. 2 illustrates the input and output voltage characteristics of the prior art driver circuit, and FIG. 3 indicates the output current characteristic thereof. Referring to FIG. 2, referential character V.sub.in is a voltage signal supplied to the input terminal 8 of the prior art driver circuit shown in FIG. 1, and referential character V.sub.out is an output voltage signal from the inverter 6 which is impressed on the gate electrode of FET 10.
For operation of a load such as LED, the switching FET 10 should preferably be of the enhancement type. However, the enhancement type FET has an intrinsic property that where a gate voltage exceeds a threshold level, current flowing through said FET sharply rises. Therefore, the prior art driver circuit of FIG. 1 has the drawback that where an output voltage signal V.sub.out from the inverter 6 rises over the threshold voltage (indicated by character V.sub.th in FIG. 2) of the FET 10, then current passing through the FET 10 suddenly increases, as shown in FIG. 3.